src/dynarmic/src/dynarmic/backend/x64/emit_x64.cpp

@@ -38,11 +38,6 @@ EmitContext::EmitContext(RegAlloc& reg_alloc, IR::Block& block)
 
 EmitContext::~EmitContext() = default;
 
-void EmitContext::EraseInstruction(IR::Inst* inst) {
-    block.Instructions().erase(inst);
-    inst->ClearArgs();
-}
-
 EmitX64::EmitX64(BlockOfCode& code)
         : code(code) {
     exception_handler.Register(code);

src/dynarmic/src/dynarmic/backend/x64/emit_x64.h

@@ -1,3 +1,6 @@
+// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
 /* This file is part of the dynarmic project.
  * Copyright (c) 2016 MerryMage
  * SPDX-License-Identifier: 0BSD
@@ -54,8 +57,6 @@ struct EmitContext {
     EmitContext(RegAlloc& reg_alloc, IR::Block& block);
     virtual ~EmitContext();
 
-    void EraseInstruction(IR::Inst* inst);
-
     virtual FP::FPCR FPCR(bool fpcr_controlled = true) const = 0;
 
     virtual bool HasOptimization(OptimizationFlag flag) const = 0;

src/dynarmic/src/dynarmic/ir/basic_block.cpp

@@ -46,7 +46,7 @@ Block::iterator Block::PrependNewInst(iterator insertion_point, Opcode opcode, s
         inst->SetArg(index, arg);
         index++;
     });
-    return instructions.insert_before(insertion_point, inst);
+    return instructions.insert(insertion_point, *inst);
 }
 
 static std::string TerminalToString(const Terminal& terminal_variant) noexcept {

src/dynarmic/src/dynarmic/ir/basic_block.h

@@ -12,10 +12,9 @@
 #include <memory>
 #include <optional>
 #include <string>
+#include <boost/intrusive/list.hpp>
 
-#include <mcl/container/intrusive_list.hpp>
 #include "dynarmic/common/common_types.h"
-
 #include "dynarmic/ir/location_descriptor.h"
 #include "dynarmic/ir/microinstruction.h"
 #include "dynarmic/ir/terminal.h"
@@ -35,7 +34,7 @@ enum class Opcode;
 class Block final {
 public:
     //using instruction_list_type = dense_list<Inst>;
-    using instruction_list_type = mcl::intrusive_list<Inst>;
+    using instruction_list_type = boost::intrusive::list<Inst>;
     using size_type = instruction_list_type::size_type;
     using iterator = instruction_list_type::iterator;
     using const_iterator = instruction_list_type::const_iterator;

src/dynarmic/src/dynarmic/ir/ir_emitter.h

@@ -10,10 +10,10 @@
 
 #include <vector>
 
-#include "dynarmic/common/common_types.h"
-#include "dynarmic/common/assert.h"
 #include <mcl/bit_cast.hpp>
 
+#include "dynarmic/common/common_types.h"
+#include "dynarmic/common/assert.h"
 #include "dynarmic/ir/opcodes.h"
 #include "dynarmic/ir/acc_type.h"
 #include "dynarmic/ir/basic_block.h"
@@ -124,7 +124,7 @@ public:
             ASSERT(value.GetType() == Type::U64);
             return value;
         }
-        ASSERT_FALSE("Invalid bitsize");
+        ASSERT_MSG(false, "Invalid bitsize");
     }
 
     U32 LeastSignificantWord(const U64& value) {
@@ -2950,19 +2950,10 @@ public:
         block.SetTerminal(terminal);
     }
 
-    void SetInsertionPointBefore(IR::Inst* new_insertion_point) {
-        insertion_point = IR::Block::iterator{*new_insertion_point};
-    }
-
     void SetInsertionPointBefore(IR::Block::iterator new_insertion_point) {
         insertion_point = new_insertion_point;
     }
 
-    void SetInsertionPointAfter(IR::Inst* new_insertion_point) {
-        insertion_point = IR::Block::iterator{*new_insertion_point};
-        ++insertion_point;
-    }
-
     void SetInsertionPointAfter(IR::Block::iterator new_insertion_point) {
         insertion_point = new_insertion_point;
         ++insertion_point;

src/dynarmic/src/dynarmic/ir/microinstruction.h

@@ -9,10 +9,9 @@
 #pragma once
 
 #include <array>
+#include <boost/intrusive/list.hpp>
 
-#include <mcl/container/intrusive_list.hpp>
 #include "dynarmic/common/common_types.h"
-
 #include "dynarmic/ir/value.h"
 #include "dynarmic/ir/opcodes.h"
 
@@ -26,7 +25,7 @@ constexpr size_t max_arg_count = 4;
 /// A representation of a microinstruction. A single ARM/Thumb instruction may be
 /// converted into zero or more microinstructions.
 //class Inst final {
-class Inst final : public mcl::intrusive_list_node<Inst> {
+class Inst final : public boost::intrusive::list_base_hook<> {
 public:
     explicit Inst(Opcode op) : op(op) {}
 

src/dynarmic/src/dynarmic/ir/opt_passes.cpp

@@ -86,12 +86,10 @@ static void ConstantMemoryReads(IR::Block& block, A32::UserCallbacks* cb) {
 }
 
 static void FlagsPass(IR::Block& block) {
-    using Iterator = std::reverse_iterator<IR::Block::iterator>;
-
     struct FlagInfo {
         bool set_not_required = false;
         bool has_value_request = false;
-        Iterator value_request = {};
+        IR::Block::reverse_iterator value_request = {};
     };
     struct ValuelessFlagInfo {
         bool set_not_required = false;
@@ -102,7 +100,7 @@ static void FlagsPass(IR::Block& block) {
     FlagInfo c_flag;
     FlagInfo ge;
 
-    auto do_set = [&](FlagInfo& info, IR::Value value, Iterator inst) {
+    auto do_set = [&](FlagInfo& info, IR::Value value, IR::Block::reverse_iterator const inst) {
         if (info.has_value_request) {
             info.value_request->ReplaceUsesWith(value);
         }
@@ -114,14 +112,14 @@ static void FlagsPass(IR::Block& block) {
         info.set_not_required = true;
     };
 
-    auto do_set_valueless = [&](ValuelessFlagInfo& info, Iterator inst) {
+    auto do_set_valueless = [&](ValuelessFlagInfo& info, IR::Block::reverse_iterator const inst) {
         if (info.set_not_required) {
             inst->Invalidate();
         }
         info.set_not_required = true;
     };
 
-    auto do_get = [](FlagInfo& info, Iterator inst) {
+    auto do_get = [](FlagInfo& info, IR::Block::reverse_iterator const inst) {
         if (info.has_value_request) {
             info.value_request->ReplaceUsesWith(IR::Value{&*inst});
         }
@@ -448,7 +446,8 @@ static void A64CallbackConfigPass(IR::Block& block, const A64::UserConfig& conf)
         return;
     }
 
-    for (auto& inst : block) {
+    for (auto it = block.begin(); it != block.end(); it++) {
+        auto& inst = *it;
         if (inst.GetOpcode() != IR::Opcode::A64DataCacheOperationRaised) {
             continue;
         }
@@ -457,7 +456,7 @@ static void A64CallbackConfigPass(IR::Block& block, const A64::UserConfig& conf)
         if (op == A64::DataCacheOperation::ZeroByVA) {
             A64::IREmitter ir{block};
             ir.current_location = A64::LocationDescriptor{IR::LocationDescriptor{inst.GetArg(0).GetU64()}};
-            ir.SetInsertionPointBefore(&inst);
+            ir.SetInsertionPointBefore(it);
 
             size_t bytes = 4 << static_cast<size_t>(conf.dczid_el0 & 0b1111);
             IR::U64 addr{inst.GetArg(2)};
@@ -1244,7 +1243,7 @@ static void IdentityRemovalPass(IR::Block& block) {
         }
 
         if (inst.GetOpcode() == IR::Opcode::Identity || inst.GetOpcode() == IR::Opcode::Void) {
-            iter = block.Instructions().erase(inst);
+            iter = block.Instructions().erase(iter);
             to_invalidate.push_back(&inst);
         } else {
             ++iter;
@@ -1406,8 +1405,9 @@ static void PolyfillPass(IR::Block& block, const PolyfillOptions& polyfill) {
 
     IR::IREmitter ir{block};
 
-    for (auto& inst : block) {
+    for (auto it = block.begin(); it != block.end(); it++) {
-        ir.SetInsertionPointBefore(&inst);
+        auto& inst = *it;
+        ir.SetInsertionPointBefore(it);
 
         switch (inst.GetOpcode()) {
         case IR::Opcode::SHA256MessageSchedule0: