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[nvisa] isberd hacky implementation #124

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CamilleLaVey merged 2 commits from isberdhack1 into master 2025-07-25 04:38:51 +02:00
Conversation 0 Commits 2 Files changed 1 +11 -2
1 changed files with 11 additions and 2 deletions
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11
src/shader_recompiler/frontend/maxwell/translate/impl/internal_stage_buffer_entry_read.cpp
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@ -22,11 +22,14 @@ enum class Shift : u64 {
} // Anonymous namespace } // Anonymous namespace
// Valid only for GS, TI, VS and trap
void TranslatorVisitor::ISBERD(u64 insn) { void TranslatorVisitor::ISBERD(u64 insn) {
union { union {
u64 raw; u64 raw;
BitField<0, 8, IR::Reg> dest_reg; BitField<0, 8, IR::Reg> dest_reg;
BitField<8, 8, IR::Reg> src_reg; BitField<8, 8, IR::Reg> src_reg;
BitField<8, 8, u32> src_reg_num;
BitField<24, 8, u32> imm;
BitField<31, 1, u64> skew; BitField<31, 1, u64> skew;
BitField<32, 1, u64> o; BitField<32, 1, u64> o;
BitField<33, 2, Mode> mode; BitField<33, 2, Mode> mode;
@ -45,8 +48,14 @@ void TranslatorVisitor::ISBERD(u64 insn) {
if (isberd.shift != Shift::Default) { if (isberd.shift != Shift::Default) {
throw NotImplementedException("Shift {}", isberd.shift.Value()); throw NotImplementedException("Shift {}", isberd.shift.Value());
} }
LOG_WARNING(Shader, "(STUBBED) called"); //LOG_DEBUG(Shader, "(STUBBED) called {}", insn);
if (isberd.src_reg_num == 0xFF) {
IR::U32 src_imm{ir.Imm32(static_cast<u32>(isberd.imm))};
IR::U32 result{ir.IAdd(X(isberd.src_reg), src_imm)};
X(isberd.dest_reg, result);
} else {
X(isberd.dest_reg, X(isberd.src_reg)); X(isberd.dest_reg, X(isberd.src_reg));
}
} }
} // namespace Shader::Maxwell } // namespace Shader::Maxwell