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0bb6e12cc4
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0bb6e12cc4 | |||
6dbc3e9601 |
7 changed files with 22 additions and 37 deletions
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@ -38,11 +38,6 @@ EmitContext::EmitContext(RegAlloc& reg_alloc, IR::Block& block)
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EmitContext::~EmitContext() = default;
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void EmitContext::EraseInstruction(IR::Inst* inst) {
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block.Instructions().erase(inst);
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inst->ClearArgs();
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}
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EmitX64::EmitX64(BlockOfCode& code)
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: code(code) {
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exception_handler.Register(code);
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@ -1,3 +1,6 @@
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// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
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// SPDX-License-Identifier: GPL-3.0-or-later
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/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* SPDX-License-Identifier: 0BSD
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@ -54,8 +57,6 @@ struct EmitContext {
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EmitContext(RegAlloc& reg_alloc, IR::Block& block);
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virtual ~EmitContext();
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void EraseInstruction(IR::Inst* inst);
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virtual FP::FPCR FPCR(bool fpcr_controlled = true) const = 0;
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virtual bool HasOptimization(OptimizationFlag flag) const = 0;
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@ -46,7 +46,7 @@ Block::iterator Block::PrependNewInst(iterator insertion_point, Opcode opcode, s
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inst->SetArg(index, arg);
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index++;
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});
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return instructions.insert_before(insertion_point, inst);
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return instructions.insert(insertion_point, *inst);
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}
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static std::string TerminalToString(const Terminal& terminal_variant) noexcept {
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@ -12,10 +12,9 @@
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#include <memory>
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#include <optional>
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#include <string>
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#include <boost/intrusive/list.hpp>
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#include <mcl/container/intrusive_list.hpp>
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#include "dynarmic/common/common_types.h"
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#include "dynarmic/ir/location_descriptor.h"
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#include "dynarmic/ir/microinstruction.h"
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#include "dynarmic/ir/terminal.h"
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@ -35,7 +34,7 @@ enum class Opcode;
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class Block final {
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public:
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//using instruction_list_type = dense_list<Inst>;
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using instruction_list_type = mcl::intrusive_list<Inst>;
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using instruction_list_type = boost::intrusive::list<Inst>;
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using size_type = instruction_list_type::size_type;
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using iterator = instruction_list_type::iterator;
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using const_iterator = instruction_list_type::const_iterator;
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@ -10,10 +10,10 @@
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#include <vector>
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#include "dynarmic/common/common_types.h"
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#include "dynarmic/common/assert.h"
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#include <mcl/bit_cast.hpp>
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#include "dynarmic/common/common_types.h"
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#include "dynarmic/common/assert.h"
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#include "dynarmic/ir/opcodes.h"
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#include "dynarmic/ir/acc_type.h"
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#include "dynarmic/ir/basic_block.h"
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@ -124,7 +124,7 @@ public:
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ASSERT(value.GetType() == Type::U64);
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return value;
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}
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ASSERT_FALSE("Invalid bitsize");
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ASSERT_MSG(false, "Invalid bitsize");
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}
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U32 LeastSignificantWord(const U64& value) {
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@ -2950,19 +2950,10 @@ public:
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block.SetTerminal(terminal);
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}
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void SetInsertionPointBefore(IR::Inst* new_insertion_point) {
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insertion_point = IR::Block::iterator{*new_insertion_point};
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}
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void SetInsertionPointBefore(IR::Block::iterator new_insertion_point) {
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insertion_point = new_insertion_point;
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}
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void SetInsertionPointAfter(IR::Inst* new_insertion_point) {
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insertion_point = IR::Block::iterator{*new_insertion_point};
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++insertion_point;
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}
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void SetInsertionPointAfter(IR::Block::iterator new_insertion_point) {
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insertion_point = new_insertion_point;
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++insertion_point;
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@ -9,10 +9,9 @@
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#pragma once
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#include <array>
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#include <boost/intrusive/list.hpp>
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#include <mcl/container/intrusive_list.hpp>
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#include "dynarmic/common/common_types.h"
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#include "dynarmic/ir/value.h"
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#include "dynarmic/ir/opcodes.h"
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@ -26,7 +25,7 @@ constexpr size_t max_arg_count = 4;
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/// A representation of a microinstruction. A single ARM/Thumb instruction may be
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/// converted into zero or more microinstructions.
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//class Inst final {
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class Inst final : public mcl::intrusive_list_node<Inst> {
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class Inst final : public boost::intrusive::list_base_hook<> {
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public:
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explicit Inst(Opcode op) : op(op) {}
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@ -85,12 +85,10 @@ static void ConstantMemoryReads(IR::Block& block, A32::UserCallbacks* cb) {
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}
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static void FlagsPass(IR::Block& block) {
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using Iterator = std::reverse_iterator<IR::Block::iterator>;
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struct FlagInfo {
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bool set_not_required = false;
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bool has_value_request = false;
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Iterator value_request = {};
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IR::Block::reverse_iterator value_request = {};
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};
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struct ValuelessFlagInfo {
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bool set_not_required = false;
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@ -101,7 +99,7 @@ static void FlagsPass(IR::Block& block) {
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FlagInfo c_flag;
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FlagInfo ge;
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auto do_set = [&](FlagInfo& info, IR::Value value, Iterator inst) {
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auto do_set = [&](FlagInfo& info, IR::Value value, IR::Block::reverse_iterator const inst) {
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if (info.has_value_request) {
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info.value_request->ReplaceUsesWith(value);
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}
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@ -113,14 +111,14 @@ static void FlagsPass(IR::Block& block) {
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info.set_not_required = true;
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};
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auto do_set_valueless = [&](ValuelessFlagInfo& info, Iterator inst) {
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auto do_set_valueless = [&](ValuelessFlagInfo& info, IR::Block::reverse_iterator const inst) {
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if (info.set_not_required) {
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inst->Invalidate();
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}
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info.set_not_required = true;
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};
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auto do_get = [](FlagInfo& info, Iterator inst) {
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auto do_get = [](FlagInfo& info, IR::Block::reverse_iterator const inst) {
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if (info.has_value_request) {
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info.value_request->ReplaceUsesWith(IR::Value{&*inst});
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}
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@ -447,7 +445,8 @@ static void A64CallbackConfigPass(IR::Block& block, const A64::UserConfig& conf)
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return;
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}
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for (auto& inst : block) {
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for (auto it = block.begin(); it != block.end(); it++) {
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auto& inst = *it;
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if (inst.GetOpcode() != IR::Opcode::A64DataCacheOperationRaised) {
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continue;
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}
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@ -456,7 +455,7 @@ static void A64CallbackConfigPass(IR::Block& block, const A64::UserConfig& conf)
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if (op == A64::DataCacheOperation::ZeroByVA) {
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A64::IREmitter ir{block};
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ir.current_location = A64::LocationDescriptor{IR::LocationDescriptor{inst.GetArg(0).GetU64()}};
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ir.SetInsertionPointBefore(&inst);
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ir.SetInsertionPointBefore(it);
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size_t bytes = 4 << static_cast<size_t>(conf.dczid_el0 & 0b1111);
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IR::U64 addr{inst.GetArg(2)};
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@ -1243,7 +1242,7 @@ static void IdentityRemovalPass(IR::Block& block) {
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}
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if (inst.GetOpcode() == IR::Opcode::Identity || inst.GetOpcode() == IR::Opcode::Void) {
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iter = block.Instructions().erase(inst);
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iter = block.Instructions().erase(iter);
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to_invalidate.push_back(&inst);
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} else {
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++iter;
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@ -1405,8 +1404,9 @@ static void PolyfillPass(IR::Block& block, const PolyfillOptions& polyfill) {
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IR::IREmitter ir{block};
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for (auto& inst : block) {
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ir.SetInsertionPointBefore(&inst);
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for (auto it = block.begin(); it != block.end(); it++) {
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auto& inst = *it;
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ir.SetInsertionPointBefore(it);
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switch (inst.GetOpcode()) {
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case IR::Opcode::SHA256MessageSchedule0:
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