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[dynarmic] add safe-opt to skip IR verification (#2613)

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Most programs are well behaved and don't cause internal IR issues. Hence, verification can be safely skipped.

Signed-off-by: lizzie <lizzie@eden-emu.dev>

Reviewed-on: #2613
Reviewed-by: MaranBr <maranbr@eden-emu.dev>
Co-authored-by: lizzie <lizzie@eden-emu.dev>
Co-committed-by: lizzie <lizzie@eden-emu.dev>
This commit is contained in:
lizzie 2025-10-02 23:20:45 +02:00 • committed by crueter
parent 2d8cb2d457
commit de594c8792
Signed by: crueter
GPG key ID: 425ACD2D4830EBC6
2 changed files with 9 additions and 4 deletions
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5
src/dynarmic/src/dynarmic/interface/optimization_flags.h
View file

@ -1,3 +1,6 @@
// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
// SPDX-License-Identifier: GPL-3.0-or-later
/* This file is part of the dynarmic project. /* This file is part of the dynarmic project.
* Copyright (c) 2020 MerryMage * Copyright (c) 2020 MerryMage
* SPDX-License-Identifier: 0BSD * SPDX-License-Identifier: 0BSD
@ -34,6 +37,8 @@ enum class OptimizationFlag : std::uint32_t {
MiscIROpt = 0x00000020, MiscIROpt = 0x00000020,
/// Optimize for code speed rather than for code size (this serves well for tight loops) /// Optimize for code speed rather than for code size (this serves well for tight loops)
CodeSpeed = 0x00000040, CodeSpeed = 0x00000040,
/// Disable verification passes
DisableVerification = 0x00000080,
/// This is an UNSAFE optimization that reduces accuracy of fused multiply-add operations. /// This is an UNSAFE optimization that reduces accuracy of fused multiply-add operations.
/// This unfuses fused instructions to improve performance on host CPUs without FMA support. /// This unfuses fused instructions to improve performance on host CPUs without FMA support.

8
src/dynarmic/src/dynarmic/ir/opt_passes.cpp
View file

@ -1491,9 +1491,9 @@ void Optimize(IR::Block& block, const A32::UserConfig& conf, const Optimization:
Optimization::DeadCodeElimination(block); Optimization::DeadCodeElimination(block);
} }
Optimization::IdentityRemovalPass(block); Optimization::IdentityRemovalPass(block);
//if (!conf.HasOptimization(OptimizationFlag::DisableVerification)) { if (!conf.HasOptimization(OptimizationFlag::DisableVerification)) {
Optimization::VerificationPass(block); Optimization::VerificationPass(block);
//} }
} }
void Optimize(IR::Block& block, const A64::UserConfig& conf, const Optimization::PolyfillOptions& polyfill_options) { void Optimize(IR::Block& block, const A64::UserConfig& conf, const Optimization::PolyfillOptions& polyfill_options) {
@ -1511,9 +1511,9 @@ void Optimize(IR::Block& block, const A64::UserConfig& conf, const Optimization:
if (conf.HasOptimization(OptimizationFlag::MiscIROpt)) [[likely]] { if (conf.HasOptimization(OptimizationFlag::MiscIROpt)) [[likely]] {
Optimization::A64MergeInterpretBlocksPass(block, conf.callbacks); Optimization::A64MergeInterpretBlocksPass(block, conf.callbacks);
} }
//if (!conf.HasOptimization(OptimizationFlag::DisableVerification)) { if (!conf.HasOptimization(OptimizationFlag::DisableVerification)) {
Optimization::VerificationPass(block); Optimization::VerificationPass(block);
//} }
} }
} // namespace Dynarmic::Optimization } // namespace Dynarmic::Optimization