diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/internal_stage_buffer_entry_read.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/internal_stage_buffer_entry_read.cpp
index 8dc22282ca..e6345de65e 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/internal_stage_buffer_entry_read.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/internal_stage_buffer_entry_read.cpp
@@ -32,21 +32,21 @@ enum class Shift : u64 {
 
 IR::U32 scaleIndex(IR::IREmitter& ir, IR::U32 index, Shift shift) {
     switch (shift) {
-    case Shift::Default: return index;
-    case Shift::U16:     return ir.ShiftLeftLogical(index, ir.Imm32(1));
-    case Shift::B32:     return ir.ShiftLeftLogical(index, ir.Imm32(2));
-    default:             UNREACHABLE();
+        case Shift::Default: return index;
+        case Shift::U16: return ir.ShiftLeftLogical(index, ir.Imm32(1));
+        case Shift::B32: return ir.ShiftLeftLogical(index, ir.Imm32(2));
+        default: UNREACHABLE();
     }
 }
 
 IR::U32 skewBytes(IR::IREmitter& ir, SZ sizeRead) {
     const IR::U32 lane = ir.LaneId();
     switch (sizeRead) {
-    case SZ::U8:  return lane;
-    case SZ::U16: return ir.ShiftLeftLogical(lane, ir.Imm32(1));
-    case SZ::U32:
-    case SZ::F32: return ir.ShiftLeftLogical(lane, ir.Imm32(2));
-    default:      UNREACHABLE();
+        case SZ::U8:  return lane;
+        case SZ::U16: return ir.ShiftLeftLogical(lane, ir.Imm32(1));
+        case SZ::U32:
+        case SZ::F32: return ir.ShiftLeftLogical(lane, ir.Imm32(2));
+        default: UNREACHABLE();
     }
 }
 
@@ -88,7 +88,7 @@ void TranslatorVisitor::ISBERD(u64 insn) {
         case SZ::U16: globalLoaded = ir.LoadGlobalU16(index64); break;
         case SZ::U32:
         case SZ::F32: globalLoaded = ir.LoadGlobal32(index64);  break;
-        default:      UNREACHABLE();
+        default: UNREACHABLE();
         }
         X(isberd.dest_reg.Value(), globalLoaded);
 
@@ -102,10 +102,13 @@ void TranslatorVisitor::ISBERD(u64 insn) {
 
         IR::F32 float_index{};
         switch (isberd.mode.Value()) {
-        case Mode::Patch: float_index = ir.GetPatch(index.Patch());             break;
-        case Mode::Prim:  float_index = ir.GetAttribute(index.Attribute());     break;
-        case Mode::Attr:  float_index = ir.GetAttributeIndexed(index);          break;
-        default:          UNREACHABLE();
+        case Mode::Patch: float_index = ir.GetPatch(index.Patch());
+            break;
+        case Mode::Prim:  float_index = ir.GetAttribute(index.Attribute());
+            break;
+        case Mode::Attr:  float_index = ir.GetAttributeIndexed(index);
+            break;
+        default: UNREACHABLE();
         }
         X(isberd.dest_reg.Value(), ir.BitCast<IR::U32>(float_index));