From bdfcb6c950ad59bb2c4637c741985ab228c8dab6 Mon Sep 17 00:00:00 2001 From: lizzie Date: Fri, 25 Jul 2025 04:38:50 +0200 Subject: [PATCH] [shader_recompiler/ Maxwell] ISBERD initial implementation Adds the initial support for Internal Stage Buffer Entry Read - ISBERD, a mechanism used to read internal stage buffer entries with accurate per-stage synchronization. This enables more precise tracking of GPU buffer accesses, improving compatibility with games relying on fine-grained intermediate rendering stages (especially UE4 titles and post-processing heavy engines). Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/124 Co-authored-by: lizzie Co-committed-by: lizzie --- .../impl/internal_stage_buffer_entry_read.cpp | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/internal_stage_buffer_entry_read.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/internal_stage_buffer_entry_read.cpp index 7025f14a2f..59ca4b15a3 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/internal_stage_buffer_entry_read.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/internal_stage_buffer_entry_read.cpp @@ -22,11 +22,14 @@ enum class Shift : u64 { } // Anonymous namespace +// Valid only for GS, TI, VS and trap void TranslatorVisitor::ISBERD(u64 insn) { union { u64 raw; BitField<0, 8, IR::Reg> dest_reg; BitField<8, 8, IR::Reg> src_reg; + BitField<8, 8, u32> src_reg_num; + BitField<24, 8, u32> imm; BitField<31, 1, u64> skew; BitField<32, 1, u64> o; BitField<33, 2, Mode> mode; @@ -45,8 +48,14 @@ void TranslatorVisitor::ISBERD(u64 insn) { if (isberd.shift != Shift::Default) { throw NotImplementedException("Shift {}", isberd.shift.Value()); } - LOG_WARNING(Shader, "(STUBBED) called"); - X(isberd.dest_reg, X(isberd.src_reg)); + //LOG_DEBUG(Shader, "(STUBBED) called {}", insn); + if (isberd.src_reg_num == 0xFF) { + IR::U32 src_imm{ir.Imm32(static_cast(isberd.imm))}; + IR::U32 result{ir.IAdd(X(isberd.src_reg), src_imm)}; + X(isberd.dest_reg, result); + } else { + X(isberd.dest_reg, X(isberd.src_reg)); + } } } // namespace Shader::Maxwell