forked from eden-emu/eden
		
	arm: Throw out a lot of unnecessary code
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							|  | @ -15,8 +15,6 @@ | ||||||
|     along with this program; if not, write to the Free Software |     along with this program; if not, write to the Free Software | ||||||
|     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | ||||||
| 
 | 
 | ||||||
| //#include <unistd.h>
 |  | ||||||
| 
 |  | ||||||
| #include "core/arm/skyeye_common/armdefs.h" | #include "core/arm/skyeye_common/armdefs.h" | ||||||
| #include "core/arm/skyeye_common/armemu.h" | #include "core/arm/skyeye_common/armemu.h" | ||||||
| 
 | 
 | ||||||
|  | @ -24,26 +22,21 @@ | ||||||
| *                 Definitions for the emulator architecture                 * | *                 Definitions for the emulator architecture                 * | ||||||
| \***************************************************************************/ | \***************************************************************************/ | ||||||
| 
 | 
 | ||||||
| void ARMul_EmulateInit (void); | void ARMul_EmulateInit(); | ||||||
| ARMul_State *ARMul_NewState (ARMul_State * state); | ARMul_State* ARMul_NewState(ARMul_State* state); | ||||||
| void ARMul_Reset (ARMul_State * state); | void ARMul_Reset (ARMul_State* state); | ||||||
| ARMword ARMul_DoCycle (ARMul_State * state); | ARMword ARMul_DoCycle(ARMul_State* state); | ||||||
| unsigned ARMul_DoCoPro (ARMul_State * state); | unsigned ARMul_DoCoPro(ARMul_State* state); | ||||||
| ARMword ARMul_DoProg (ARMul_State * state); | ARMword ARMul_DoProg(ARMul_State* state); | ||||||
| ARMword ARMul_DoInstr (ARMul_State * state); | ARMword ARMul_DoInstr(ARMul_State* state); | ||||||
| void ARMul_Abort (ARMul_State * state, ARMword address); | void ARMul_Abort(ARMul_State* state, ARMword address); | ||||||
| 
 | 
 | ||||||
| unsigned ARMul_MultTable[32] = { | unsigned ARMul_MultTable[32] = { | ||||||
|     1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, |     1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, | ||||||
|     10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 16 |     10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 16 | ||||||
| }; | }; | ||||||
| ARMword ARMul_ImmedTable[4096];	/* immediate DP LHS values */ | ARMword ARMul_ImmedTable[4096]; /* immediate DP LHS values */ | ||||||
| char ARMul_BitList[256];	/* number of bits in a byte table */ | char ARMul_BitList[256];        /* number of bits in a byte table */ | ||||||
| 
 |  | ||||||
| //chy 2006-02-22 add test debugmode
 |  | ||||||
| extern int debugmode; |  | ||||||
| extern int remote_interrupt( void ); |  | ||||||
| 
 |  | ||||||
| 
 | 
 | ||||||
| void arm_dyncom_Abort(ARMul_State * state, ARMword vector) | void arm_dyncom_Abort(ARMul_State * state, ARMword vector) | ||||||
| { | { | ||||||
|  | @ -51,36 +44,10 @@ void arm_dyncom_Abort(ARMul_State * state, ARMword vector) | ||||||
| } | } | ||||||
| 
 | 
 | ||||||
| 
 | 
 | ||||||
| /* ahe-ykl : the following code to initialize user mode
 |  | ||||||
|    code is architecture dependent and probably model dependant. */ |  | ||||||
| 
 |  | ||||||
| /*#include "skyeye_arch.h"
 |  | ||||||
| #include "skyeye_pref.h" |  | ||||||
| #include "skyeye_exec_info.h" |  | ||||||
| #include "bank_defs.h"*/ |  | ||||||
| //#include "armcpu.h"
 |  | ||||||
| //#include "skyeye_callback.h"
 |  | ||||||
| 
 |  | ||||||
| /*
 |  | ||||||
| 		ARM_CPU_State* cpu = get_current_cpu(); |  | ||||||
| 		arm_core_t* core = &cpu->core[0]; |  | ||||||
| 
 |  | ||||||
| 		uint32_t sp = info->initial_sp; |  | ||||||
| 
 |  | ||||||
| 		core->Cpsr = 0x10; // User mode
 |  | ||||||
| // FIXME: may need to add thumb
 |  | ||||||
| core->Reg[13] = sp; |  | ||||||
| core->Reg[10] = info->start_data; |  | ||||||
| core->Reg[0] = 0; |  | ||||||
| bus_read(32, sp + 4, &(core->Reg[1])); |  | ||||||
| bus_read(32, sp + 8, &(core->Reg[2])); |  | ||||||
| */ |  | ||||||
| /***************************************************************************\
 | /***************************************************************************\
 | ||||||
| *         Call this routine once to set up the emulator's tables.           * | *         Call this routine once to set up the emulator's tables.           * | ||||||
| \***************************************************************************/ | \***************************************************************************/ | ||||||
| 
 | void ARMul_EmulateInit() | ||||||
| void |  | ||||||
| ARMul_EmulateInit (void) |  | ||||||
| { | { | ||||||
|     unsigned int i, j; |     unsigned int i, j; | ||||||
| 
 | 
 | ||||||
|  | @ -102,9 +69,7 @@ ARMul_EmulateInit (void) | ||||||
| /***************************************************************************\
 | /***************************************************************************\
 | ||||||
| *            Returns a new instantiation of the ARMulator's state           * | *            Returns a new instantiation of the ARMulator's state           * | ||||||
| \***************************************************************************/ | \***************************************************************************/ | ||||||
| 
 | ARMul_State* ARMul_NewState(ARMul_State* state) | ||||||
| ARMul_State * |  | ||||||
| ARMul_NewState (ARMul_State *state) |  | ||||||
| { | { | ||||||
|     unsigned i, j; |     unsigned i, j; | ||||||
| 
 | 
 | ||||||
|  | @ -120,7 +85,6 @@ ARMul_NewState (ARMul_State *state) | ||||||
|         state->Spsr[i] = 0; |         state->Spsr[i] = 0; | ||||||
|     state->Mode = 0; |     state->Mode = 0; | ||||||
| 
 | 
 | ||||||
|     state->CallDebug = FALSE; |  | ||||||
|     state->Debug = FALSE; |     state->Debug = FALSE; | ||||||
|     state->VectorCatch = 0; |     state->VectorCatch = 0; | ||||||
|     state->Aborted = FALSE; |     state->Aborted = FALSE; | ||||||
|  | @ -128,34 +92,6 @@ ARMul_NewState (ARMul_State *state) | ||||||
|     state->Inted = 3; |     state->Inted = 3; | ||||||
|     state->LastInted = 3; |     state->LastInted = 3; | ||||||
| 
 | 
 | ||||||
|     state->CommandLine = NULL; |  | ||||||
| 
 |  | ||||||
|     state->EventSet = 0; |  | ||||||
|     state->Now = 0; |  | ||||||
|     state->EventPtr = |  | ||||||
|         (struct EventNode **) malloc ((unsigned) EVENTLISTSIZE * |  | ||||||
|                                       sizeof (struct EventNode *)); |  | ||||||
| #if DIFF_STATE |  | ||||||
|     state->state_log = fopen("/data/state.log", "w"); |  | ||||||
|     printf("create pc log file.\n"); |  | ||||||
| #endif |  | ||||||
|     if (state->EventPtr == NULL) { |  | ||||||
|         printf ("SKYEYE: ARMul_NewState malloc state->EventPtr error\n"); |  | ||||||
|         exit(-1); |  | ||||||
|         //skyeye_exit (-1);
 |  | ||||||
|     } |  | ||||||
|     for (i = 0; i < EVENTLISTSIZE; i++) |  | ||||||
|         *(state->EventPtr + i) = NULL; |  | ||||||
| #if SAVE_LOG |  | ||||||
|     state->state_log = fopen("/tmp/state.log", "w"); |  | ||||||
|     printf("create pc log file.\n"); |  | ||||||
| #else |  | ||||||
| #if DIFF_LOG |  | ||||||
|     state->state_log = fopen("/tmp/state.log", "r"); |  | ||||||
|     printf("loaded pc log file.\n"); |  | ||||||
| #endif |  | ||||||
| #endif |  | ||||||
| 
 |  | ||||||
| #ifdef ARM61 | #ifdef ARM61 | ||||||
|     state->prog32Sig = LOW; |     state->prog32Sig = LOW; | ||||||
|     state->data32Sig = LOW; |     state->data32Sig = LOW; | ||||||
|  | @ -168,28 +104,19 @@ ARMul_NewState (ARMul_State *state) | ||||||
|     state->bigendSig = LOW; |     state->bigendSig = LOW; | ||||||
| 
 | 
 | ||||||
|     //chy:2003-08-19
 |     //chy:2003-08-19
 | ||||||
|     state->LastTime = 0; |  | ||||||
|     state->CP14R0_CCD = -1; |     state->CP14R0_CCD = -1; | ||||||
| 
 | 
 | ||||||
|     /* ahe-ykl: common function for interpret and dyncom */ |  | ||||||
|     /*sky_pref_t *pref = get_skyeye_pref();
 |  | ||||||
|     if (pref->user_mode_sim) |  | ||||||
|     	register_callback(arm_user_mode_init, Bootmach_callback); |  | ||||||
|         */ |  | ||||||
| 
 |  | ||||||
|     memset(&state->exclusive_tag_array[0], 0xFF, sizeof(state->exclusive_tag_array[0]) * 128); |     memset(&state->exclusive_tag_array[0], 0xFF, sizeof(state->exclusive_tag_array[0]) * 128); | ||||||
|     state->exclusive_access_state = 0; |     state->exclusive_access_state = 0; | ||||||
|     //state->cpu = (cpu_config_t *) malloc (sizeof (cpu_config_t));
 | 
 | ||||||
|     //state->mem_bank = (mem_config_t *) malloc (sizeof (mem_config_t));
 |     return state; | ||||||
|     return (state); |  | ||||||
| } | } | ||||||
| 
 | 
 | ||||||
| /***************************************************************************\
 | /***************************************************************************\
 | ||||||
| *       Call this routine to set ARMulator to model a certain processor     * | *       Call this routine to set ARMulator to model a certain processor     * | ||||||
| \***************************************************************************/ | \***************************************************************************/ | ||||||
| 
 | 
 | ||||||
| void | void ARMul_SelectProcessor(ARMul_State* state, unsigned properties) | ||||||
| ARMul_SelectProcessor (ARMul_State * state, unsigned properties) |  | ||||||
| { | { | ||||||
|     if (properties & ARM_Fix26_Prop) { |     if (properties & ARM_Fix26_Prop) { | ||||||
|         state->prog32Sig = LOW; |         state->prog32Sig = LOW; | ||||||
|  | @ -198,27 +125,16 @@ ARMul_SelectProcessor (ARMul_State * state, unsigned properties) | ||||||
|         state->prog32Sig = HIGH; |         state->prog32Sig = HIGH; | ||||||
|         state->data32Sig = HIGH; |         state->data32Sig = HIGH; | ||||||
|     } |     } | ||||||
|     /* 2004-05-09 chy
 |  | ||||||
|     below line sould be in skyeye_mach_XXX.c 's XXX_mach_init function |  | ||||||
|     */ |  | ||||||
|     // state->lateabtSig = HIGH;
 |  | ||||||
| 
 | 
 | ||||||
| 
 |     state->is_v4     = (properties & (ARM_v4_Prop | ARM_v5_Prop)) ? HIGH : LOW; | ||||||
|     state->is_v4 = |     state->is_v5     = (properties & ARM_v5_Prop) ? HIGH : LOW; | ||||||
|         (properties & (ARM_v4_Prop | ARM_v5_Prop)) ? HIGH : LOW; |     state->is_v5e    = (properties & ARM_v5e_Prop) ? HIGH : LOW; | ||||||
|     state->is_v5 = (properties & ARM_v5_Prop) ? HIGH : LOW; |  | ||||||
|     state->is_v5e = (properties & ARM_v5e_Prop) ? HIGH : LOW; |  | ||||||
|     state->is_XScale = (properties & ARM_XScale_Prop) ? HIGH : LOW; |     state->is_XScale = (properties & ARM_XScale_Prop) ? HIGH : LOW; | ||||||
|     state->is_iWMMXt = (properties & ARM_iWMMXt_Prop) ? HIGH : LOW; |     state->is_iWMMXt = (properties & ARM_iWMMXt_Prop) ? HIGH : LOW; | ||||||
|     /* state->is_v6 = LOW */; |     state->is_v6     = (properties & ARM_v6_Prop) ? HIGH : LOW; | ||||||
|     /* jeff.du 2010-08-05 */ |  | ||||||
|     state->is_v6 = (properties & ARM_v6_Prop) ? HIGH : LOW; |  | ||||||
|     state->is_ep9312 = (properties & ARM_ep9312_Prop) ? HIGH : LOW; |     state->is_ep9312 = (properties & ARM_ep9312_Prop) ? HIGH : LOW; | ||||||
|     //chy 2005-09-19
 |  | ||||||
|     state->is_pxa27x = (properties & ARM_PXA27X_Prop) ? HIGH : LOW; |     state->is_pxa27x = (properties & ARM_PXA27X_Prop) ? HIGH : LOW; | ||||||
| 
 |     state->is_v7     = (properties & ARM_v7_Prop) ? HIGH : LOW; | ||||||
|     /* shenoubang 2012-3-11 */ |  | ||||||
|     state->is_v7 = (properties & ARM_v7_Prop) ? HIGH : LOW; |  | ||||||
| 
 | 
 | ||||||
|     /* Only initialse the coprocessor support once we
 |     /* Only initialse the coprocessor support once we
 | ||||||
|        know what kind of chip we are dealing with.  */ |        know what kind of chip we are dealing with.  */ | ||||||
|  | @ -229,11 +145,8 @@ ARMul_SelectProcessor (ARMul_State * state, unsigned properties) | ||||||
| /***************************************************************************\
 | /***************************************************************************\
 | ||||||
| * Call this routine to set up the initial machine state (or perform a RESET * | * Call this routine to set up the initial machine state (or perform a RESET * | ||||||
| \***************************************************************************/ | \***************************************************************************/ | ||||||
| 
 | void ARMul_Reset(ARMul_State* state) | ||||||
| void |  | ||||||
| ARMul_Reset (ARMul_State * state) |  | ||||||
| { | { | ||||||
|     //fprintf(stderr,"armul_reset 0: state->  Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
 |  | ||||||
|     state->NextInstr = 0; |     state->NextInstr = 0; | ||||||
|     if (state->prog32Sig) { |     if (state->prog32Sig) { | ||||||
|         state->Reg[15] = 0; |         state->Reg[15] = 0; | ||||||
|  | @ -244,15 +157,13 @@ ARMul_Reset (ARMul_State * state) | ||||||
|         state->Cpsr = INTBITS | SVC26MODE; |         state->Cpsr = INTBITS | SVC26MODE; | ||||||
|         state->Mode = SVC26MODE; |         state->Mode = SVC26MODE; | ||||||
|     } |     } | ||||||
|     //fprintf(stderr,"armul_reset 1: state->  Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
 | 
 | ||||||
|     //ARMul_CPSRAltered (state);
 |  | ||||||
|     state->Bank = SVCBANK; |     state->Bank = SVCBANK; | ||||||
|     FLUSHPIPE; |     FLUSHPIPE; | ||||||
| 
 | 
 | ||||||
|     state->EndCondition = 0; |     state->EndCondition = 0; | ||||||
|     state->ErrorCode = 0; |     state->ErrorCode = 0; | ||||||
| 
 | 
 | ||||||
|     //fprintf(stderr,"armul_reset 2: state->  Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
 |  | ||||||
|     state->NresetSig = HIGH; |     state->NresetSig = HIGH; | ||||||
|     state->NfiqSig = HIGH; |     state->NfiqSig = HIGH; | ||||||
|     state->NirqSig = HIGH; |     state->NirqSig = HIGH; | ||||||
|  | @ -266,33 +177,6 @@ ARMul_Reset (ARMul_State * state) | ||||||
|     state->NumIcycles = 0; |     state->NumIcycles = 0; | ||||||
|     state->NumCcycles = 0; |     state->NumCcycles = 0; | ||||||
|     state->NumFcycles = 0; |     state->NumFcycles = 0; | ||||||
| 
 |  | ||||||
|     //fprintf(stderr,"armul_reset 3: state->  Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
 |  | ||||||
|     //mmu_reset (state);
 |  | ||||||
|     //fprintf(stderr,"armul_reset 4: state->  Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
 |  | ||||||
| 
 |  | ||||||
|     //mem_reset (state); /* move to memory/ram.c */
 |  | ||||||
| 
 |  | ||||||
|     //fprintf(stderr,"armul_reset 5: state->  Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
 |  | ||||||
|     /*remove later. walimis 03.7.17 */ |  | ||||||
|     //io_reset(state);
 |  | ||||||
|     //lcd_disable(state);
 |  | ||||||
| 
 |  | ||||||
|     /*ywc 2005-04-07 move from ARMul_NewState , because skyeye_config.no_dbct will
 |  | ||||||
|      *be configured in skyeye_option_init and it is called after ARMul_NewState*/ |  | ||||||
|     state->tea_break_ok = 0; |  | ||||||
|     state->tea_break_addr = 0; |  | ||||||
|     state->tea_pc = 0; |  | ||||||
| #ifdef DBCT |  | ||||||
|     if (!skyeye_config.no_dbct) { |  | ||||||
|         //teawater add for arm2x86 2005.02.14-------------------------------------------
 |  | ||||||
|         if (arm2x86_init (state)) { |  | ||||||
|             printf ("SKYEYE: arm2x86_init error\n"); |  | ||||||
|             //skyeye_exit (-1);
 |  | ||||||
|         } |  | ||||||
|         //AJ2D--------------------------------------------------------------------------
 |  | ||||||
|     } |  | ||||||
| #endif |  | ||||||
| } | } | ||||||
| 
 | 
 | ||||||
| 
 | 
 | ||||||
|  | @ -301,108 +185,23 @@ ARMul_Reset (ARMul_State * state) | ||||||
| * (Emulate26 for a 26 bit ARM and Emulate32 for a 32 bit ARM), return the   * | * (Emulate26 for a 26 bit ARM and Emulate32 for a 32 bit ARM), return the   * | ||||||
| * address of the last instruction that is executed.                         * | * address of the last instruction that is executed.                         * | ||||||
| \***************************************************************************/ | \***************************************************************************/ | ||||||
| 
 | ARMword ARMul_DoProg(ARMul_State* state) | ||||||
| //teawater add DBCT_TEST_SPEED 2005.10.04---------------------------------------
 |  | ||||||
| #ifdef DBCT_TEST_SPEED |  | ||||||
| static ARMul_State	*dbct_test_speed_state = NULL; |  | ||||||
| static void |  | ||||||
| dbct_test_speed_sig(int signo) |  | ||||||
| { |  | ||||||
|     printf("\n0x%llx %llu\n", dbct_test_speed_state->instr_count, dbct_test_speed_state->instr_count); |  | ||||||
|     exit(0); |  | ||||||
|     //skyeye_exit(0);
 |  | ||||||
| } |  | ||||||
| #endif	//DBCT_TEST_SPEED
 |  | ||||||
| //AJ2D--------------------------------------------------------------------------
 |  | ||||||
| 
 |  | ||||||
| ARMword |  | ||||||
| ARMul_DoProg (ARMul_State * state) |  | ||||||
| { | { | ||||||
|     ARMword pc = 0; |     ARMword pc = 0; | ||||||
| 
 | 
 | ||||||
|     /*
 |  | ||||||
|      * 2007-01-24 removed the term-io functions by Anthony Lee, |  | ||||||
|      * moved to "device/uart/skyeye_uart_stdio.c". |  | ||||||
|      */ |  | ||||||
| 
 |  | ||||||
| //teawater add DBCT_TEST_SPEED 2005.10.04---------------------------------------
 |  | ||||||
| #ifdef DBCT_TEST_SPEED |  | ||||||
|     { |  | ||||||
|         if (!dbct_test_speed_state) { |  | ||||||
|             //init timer
 |  | ||||||
|             struct itimerval	value; |  | ||||||
|             struct sigaction	act; |  | ||||||
| 
 |  | ||||||
|             dbct_test_speed_state = state; |  | ||||||
|             state->instr_count = 0; |  | ||||||
|             act.sa_handler = dbct_test_speed_sig; |  | ||||||
|             act.sa_flags = SA_RESTART; |  | ||||||
|             //cygwin don't support ITIMER_VIRTUAL or ITIMER_PROF
 |  | ||||||
| #ifndef __CYGWIN__ |  | ||||||
|             if (sigaction(SIGVTALRM, &act, NULL) == -1) { |  | ||||||
| #else |  | ||||||
|             if (sigaction(SIGALRM, &act, NULL) == -1) { |  | ||||||
| #endif	//__CYGWIN__
 |  | ||||||
|                 fprintf(stderr, "init timer error.\n"); |  | ||||||
|                 exit(-1); |  | ||||||
|                 //skyeye_exit(-1);
 |  | ||||||
|             } |  | ||||||
|             if (skyeye_config.dbct_test_speed_sec) { |  | ||||||
|                 value.it_value.tv_sec = skyeye_config.dbct_test_speed_sec; |  | ||||||
|             } else { |  | ||||||
|                 value.it_value.tv_sec = DBCT_TEST_SPEED_SEC; |  | ||||||
|             } |  | ||||||
|             printf("dbct_test_speed_sec = %ld\n", value.it_value.tv_sec); |  | ||||||
|             value.it_value.tv_usec = 0; |  | ||||||
|             value.it_interval.tv_sec = 0; |  | ||||||
|             value.it_interval.tv_usec = 0; |  | ||||||
| #ifndef __CYGWIN__ |  | ||||||
|             if (setitimer(ITIMER_VIRTUAL, &value, NULL) == -1) { |  | ||||||
| #else |  | ||||||
|             if (setitimer(ITIMER_REAL, &value, NULL) == -1) { |  | ||||||
| #endif	//__CYGWIN__
 |  | ||||||
|                 fprintf(stderr, "init timer error.\n"); |  | ||||||
|                 //skyeye_exit(-1);
 |  | ||||||
|             } |  | ||||||
|         } |  | ||||||
|     } |  | ||||||
| #endif	//DBCT_TEST_SPEED
 |  | ||||||
| //AJ2D--------------------------------------------------------------------------
 |  | ||||||
|     state->Emulate = RUN; |     state->Emulate = RUN; | ||||||
|     while (state->Emulate != STOP) { |     while (state->Emulate != STOP) { | ||||||
|         state->Emulate = RUN; |         state->Emulate = RUN; | ||||||
| 
 | 
 | ||||||
|         /*ywc 2005-03-31 */ |  | ||||||
|         if (state->prog32Sig && ARMul_MODE32BIT) { |         if (state->prog32Sig && ARMul_MODE32BIT) { | ||||||
| #ifdef DBCT |  | ||||||
|             if (skyeye_config.no_dbct) { |  | ||||||
|                 pc = ARMul_Emulate32 (state); |  | ||||||
|             } else { |  | ||||||
|                 pc = ARMul_Emulate32_dbct (state); |  | ||||||
|             } |  | ||||||
| #else |  | ||||||
|             pc = ARMul_Emulate32 (state); |             pc = ARMul_Emulate32 (state); | ||||||
| #endif |  | ||||||
|         } |         } | ||||||
| 
 |  | ||||||
|         else { |         else { | ||||||
|             //pc = ARMul_Emulate26 (state);
 |             //pc = ARMul_Emulate26 (state);
 | ||||||
|         } |         } | ||||||
|         //chy 2006-02-22, should test debugmode first
 |  | ||||||
|         //chy 2006-04-14, put below codes in ARMul_Emulate
 |  | ||||||
| #if 0 |  | ||||||
|         if(debugmode) |  | ||||||
|             if(remote_interrupt()) |  | ||||||
|                 state->Emulate = STOP; |  | ||||||
| #endif |  | ||||||
|     } |     } | ||||||
| 
 | 
 | ||||||
|     /*
 |     return pc; | ||||||
|      * 2007-01-24 removed the term-io functions by Anthony Lee, |  | ||||||
|      * moved to "device/uart/skyeye_uart_stdio.c". |  | ||||||
|      */ |  | ||||||
| 
 |  | ||||||
|     return (pc); |  | ||||||
| } | } | ||||||
| 
 | 
 | ||||||
| /***************************************************************************\
 | /***************************************************************************\
 | ||||||
|  | @ -410,38 +209,17 @@ ARMul_DoProg (ARMul_State * state) | ||||||
| * (Emulate26 for a 26 bit ARM and Emulate32 for a 32 bit ARM), return the   * | * (Emulate26 for a 26 bit ARM and Emulate32 for a 32 bit ARM), return the   * | ||||||
| * address of the instruction that is executed.                              * | * address of the instruction that is executed.                              * | ||||||
| \***************************************************************************/ | \***************************************************************************/ | ||||||
| 
 | ARMword ARMul_DoInstr(ARMul_State* state) | ||||||
| ARMword |  | ||||||
| ARMul_DoInstr (ARMul_State * state) |  | ||||||
| { | { | ||||||
|     ARMword pc = 0; |     ARMword pc = 0; | ||||||
| 
 | 
 | ||||||
|     state->Emulate = ONCE; |     state->Emulate = ONCE; | ||||||
| 
 | 
 | ||||||
|     /*ywc 2005-03-31 */ |  | ||||||
|     if (state->prog32Sig && ARMul_MODE32BIT) { |     if (state->prog32Sig && ARMul_MODE32BIT) { | ||||||
| #ifdef DBCT |  | ||||||
|         if (skyeye_config.no_dbct) { |  | ||||||
|             pc = ARMul_Emulate32 (state); |  | ||||||
|         } else { |  | ||||||
| //teawater add compile switch for DBCT GDB RSP function 2005.10.21--------------
 |  | ||||||
| #ifndef DBCT_GDBRSP |  | ||||||
|             printf("DBCT GDBRSP function switch is off.\n"); |  | ||||||
|             printf("To use this function, open \"#define DBCT_GDBRSP\" in arch/arm/common/armdefs.h & recompile skyeye.\n"); |  | ||||||
|             skyeye_exit(-1); |  | ||||||
| #endif	//DBCT_GDBRSP
 |  | ||||||
| //AJ2D--------------------------------------------------------------------------
 |  | ||||||
|             pc = ARMul_Emulate32_dbct (state); |  | ||||||
|         } |  | ||||||
| #else |  | ||||||
|         pc = ARMul_Emulate32 (state); |         pc = ARMul_Emulate32 (state); | ||||||
| #endif |  | ||||||
|     } |     } | ||||||
| 
 | 
 | ||||||
|     //else
 |     return pc; | ||||||
|     //pc = ARMul_Emulate26 (state);
 |  | ||||||
| 
 |  | ||||||
|     return (pc); |  | ||||||
| } | } | ||||||
| 
 | 
 | ||||||
| /***************************************************************************\
 | /***************************************************************************\
 | ||||||
|  | @ -449,9 +227,7 @@ ARMul_DoInstr (ARMul_State * state) | ||||||
| * mode, register bank, and the saving of registers.  Call with the          * | * mode, register bank, and the saving of registers.  Call with the          * | ||||||
| * appropriate vector's memory address (0,4,8 ....)                          * | * appropriate vector's memory address (0,4,8 ....)                          * | ||||||
| \***************************************************************************/ | \***************************************************************************/ | ||||||
| 
 | void ARMul_Abort(ARMul_State* state, ARMword vector) | ||||||
| void |  | ||||||
| ARMul_Abort (ARMul_State * state, ARMword vector) |  | ||||||
| { | { | ||||||
|     ARMword temp; |     ARMword temp; | ||||||
|     int isize = INSN_SIZE; |     int isize = INSN_SIZE; | ||||||
|  | @ -494,21 +270,11 @@ ARMul_Abort (ARMul_State * state, ARMword vector) | ||||||
|         SETABORT (IBIT, SVC26MODE, isize); |         SETABORT (IBIT, SVC26MODE, isize); | ||||||
|         break; |         break; | ||||||
|     case ARMul_IRQV:	/* IRQ */ |     case ARMul_IRQV:	/* IRQ */ | ||||||
|         //chy 2003-09-02 the if sentence seems no use
 |  | ||||||
| #if 0 |  | ||||||
|         if (!state->is_XScale || !state->CPRead[13] (state, 0, &temp) |  | ||||||
|                 || (temp & ARMul_CP13_R0_IRQ)) |  | ||||||
| #endif |  | ||||||
|             SETABORT (IBIT, |             SETABORT (IBIT, | ||||||
|                       state->prog32Sig ? IRQ32MODE : IRQ26MODE, |                       state->prog32Sig ? IRQ32MODE : IRQ26MODE, | ||||||
|                       esize); |                       esize); | ||||||
|         break; |         break; | ||||||
|     case ARMul_FIQV:	/* FIQ */ |     case ARMul_FIQV:	/* FIQ */ | ||||||
|         //chy 2003-09-02 the if sentence seems no use
 |  | ||||||
| #if 0 |  | ||||||
|         if (!state->is_XScale || !state->CPRead[13] (state, 0, &temp) |  | ||||||
|                 || (temp & ARMul_CP13_R0_FIQ)) |  | ||||||
| #endif |  | ||||||
|             SETABORT (INTBITS, |             SETABORT (INTBITS, | ||||||
|                       state->prog32Sig ? FIQ32MODE : FIQ26MODE, |                       state->prog32Sig ? FIQ32MODE : FIQ26MODE, | ||||||
|                       esize); |                       esize); | ||||||
|  |  | ||||||
|  | @ -22,13 +22,6 @@ | ||||||
| 
 | 
 | ||||||
| 
 | 
 | ||||||
| static ARMword ModeToBank (ARMword); | static ARMword ModeToBank (ARMword); | ||||||
| static void EnvokeList (ARMul_State *, unsigned int, unsigned int); |  | ||||||
| 
 |  | ||||||
| struct EventNode { |  | ||||||
|     /* An event list node.  */ |  | ||||||
|     unsigned (*func) (ARMul_State *);	/* The function to call.  */ |  | ||||||
|     struct EventNode *next; |  | ||||||
| }; |  | ||||||
| 
 | 
 | ||||||
| /* This routine returns the value of a register from a mode.  */ | /* This routine returns the value of a register from a mode.  */ | ||||||
| 
 | 
 | ||||||
|  | @ -1068,76 +1061,3 @@ ARMul_Align (ARMul_State* state, ARMword address, ARMword data) | ||||||
|     address = (address & 3) << 3;	/* Get the word address.  */ |     address = (address & 3) << 3;	/* Get the word address.  */ | ||||||
|     return ((data >> address) | (data << (32 - address)));	/* rot right */ |     return ((data >> address) | (data << (32 - address)));	/* rot right */ | ||||||
| } | } | ||||||
| 
 |  | ||||||
| /* This routine is used to call another routine after a certain number of
 |  | ||||||
|    cycles have been executed. The first parameter is the number of cycles |  | ||||||
|    delay before the function is called, the second argument is a pointer |  | ||||||
|    to the function. A delay of zero doesn't work, just call the function.  */ |  | ||||||
| 
 |  | ||||||
| void |  | ||||||
| ARMul_ScheduleEvent (ARMul_State * state, unsigned int delay, |  | ||||||
|                      unsigned (*what) (ARMul_State *)) |  | ||||||
| { |  | ||||||
|     unsigned int when; |  | ||||||
|     struct EventNode *event; |  | ||||||
| 
 |  | ||||||
|     if (state->EventSet++ == 0) |  | ||||||
|         state->Now = ARMul_Time (state); |  | ||||||
|     when = (state->Now + delay) % EVENTLISTSIZE; |  | ||||||
|     event = (struct EventNode *) malloc (sizeof (struct EventNode)); |  | ||||||
|     if (!event) { |  | ||||||
|         printf ("SKYEYE:ARMul_ScheduleEvent: malloc event error\n"); |  | ||||||
|         exit(-1); |  | ||||||
|         //skyeye_exit (-1);
 |  | ||||||
|     } |  | ||||||
|     event->func = what; |  | ||||||
|     event->next = *(state->EventPtr + when); |  | ||||||
|     *(state->EventPtr + when) = event; |  | ||||||
| } |  | ||||||
| 
 |  | ||||||
| /* This routine is called at the beginning of
 |  | ||||||
|    every cycle, to envoke scheduled events.  */ |  | ||||||
| 
 |  | ||||||
| void |  | ||||||
| ARMul_EnvokeEvent (ARMul_State * state) |  | ||||||
| { |  | ||||||
|     static unsigned int then; |  | ||||||
| 
 |  | ||||||
|     then = state->Now; |  | ||||||
|     state->Now = ARMul_Time (state) % EVENTLISTSIZE; |  | ||||||
|     if (then < state->Now) |  | ||||||
|         /* Schedule events.  */ |  | ||||||
|         EnvokeList (state, then, state->Now); |  | ||||||
|     else if (then > state->Now) { |  | ||||||
|         /* Need to wrap around the list.  */ |  | ||||||
|         EnvokeList (state, then, EVENTLISTSIZE - 1L); |  | ||||||
|         EnvokeList (state, 0L, state->Now); |  | ||||||
|     } |  | ||||||
| } |  | ||||||
| 
 |  | ||||||
| /* Envokes all the entries in a range.  */ |  | ||||||
| 
 |  | ||||||
| static void |  | ||||||
| EnvokeList (ARMul_State * state, unsigned int from, unsigned int to) |  | ||||||
| { |  | ||||||
|     for (; from <= to; from++) { |  | ||||||
|         struct EventNode *anevent; |  | ||||||
| 
 |  | ||||||
|         anevent = *(state->EventPtr + from); |  | ||||||
|         while (anevent) { |  | ||||||
|             (anevent->func) (state); |  | ||||||
|             state->EventSet--; |  | ||||||
|             anevent = anevent->next; |  | ||||||
|         } |  | ||||||
|         *(state->EventPtr + from) = NULL; |  | ||||||
|     } |  | ||||||
| } |  | ||||||
| 
 |  | ||||||
| /* This routine is returns the number of clock ticks since the last reset.  */ |  | ||||||
| 
 |  | ||||||
| unsigned int |  | ||||||
| ARMul_Time (ARMul_State * state) |  | ||||||
| { |  | ||||||
|     return (state->NumScycles + state->NumNcycles + |  | ||||||
|             state->NumIcycles + state->NumCcycles + state->NumFcycles); |  | ||||||
| } |  | ||||||
|  |  | ||||||
|  | @ -15,8 +15,7 @@ | ||||||
|     along with this program; if not, write to the Free Software |     along with this program; if not, write to the Free Software | ||||||
|     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | ||||||
| 
 | 
 | ||||||
| #ifndef _ARMDEFS_H_ | #pragma once | ||||||
| #define _ARMDEFS_H_ |  | ||||||
| 
 | 
 | ||||||
| #include <cerrno> | #include <cerrno> | ||||||
| #include <csignal> | #include <csignal> | ||||||
|  | @ -33,21 +32,6 @@ | ||||||
| #include "core/arm/skyeye_common/armmmu.h" | #include "core/arm/skyeye_common/armmmu.h" | ||||||
| #include "core/arm/skyeye_common/skyeye_defs.h" | #include "core/arm/skyeye_common/skyeye_defs.h" | ||||||
| 
 | 
 | ||||||
| #if EMU_PLATFORM == PLATFORM_LINUX |  | ||||||
| #include <sys/time.h> |  | ||||||
| #include <unistd.h> |  | ||||||
| #endif |  | ||||||
| 
 |  | ||||||
| #if 0 |  | ||||||
| #if 0 |  | ||||||
| #define DIFF_STATE 1 |  | ||||||
| #define __FOLLOW_MODE__ 0 |  | ||||||
| #else |  | ||||||
| #define DIFF_STATE 0 |  | ||||||
| #define __FOLLOW_MODE__ 1 |  | ||||||
| #endif |  | ||||||
| #endif |  | ||||||
| 
 |  | ||||||
| #ifndef FALSE | #ifndef FALSE | ||||||
| #define FALSE 0 | #define FALSE 0 | ||||||
| #define TRUE 1 | #define TRUE 1 | ||||||
|  | @ -58,13 +42,6 @@ | ||||||
| #define LOWHIGH 1 | #define LOWHIGH 1 | ||||||
| #define HIGHLOW 2 | #define HIGHLOW 2 | ||||||
| 
 | 
 | ||||||
| //#define DBCT_TEST_SPEED
 |  | ||||||
| #define DBCT_TEST_SPEED_SEC    10 |  | ||||||
| 
 |  | ||||||
| #define ARM_BYTE_TYPE         0 |  | ||||||
| #define ARM_HALFWORD_TYPE     1 |  | ||||||
| #define ARM_WORD_TYPE         2 |  | ||||||
| 
 |  | ||||||
| //the define of cachetype
 | //the define of cachetype
 | ||||||
| #define NONCACHE  0 | #define NONCACHE  0 | ||||||
| #define DATACACHE  1 | #define DATACACHE  1 | ||||||
|  | @ -73,18 +50,11 @@ | ||||||
| #define POS(i) ( (~(i)) >> 31 ) | #define POS(i) ( (~(i)) >> 31 ) | ||||||
| #define NEG(i) ( (i) >> 31 ) | #define NEG(i) ( (i) >> 31 ) | ||||||
| 
 | 
 | ||||||
| #ifndef __STDC__ |  | ||||||
| typedef char *VoidStar; |  | ||||||
| #endif |  | ||||||
| 
 |  | ||||||
| typedef u64 ARMdword;  // must be 64 bits wide
 | typedef u64 ARMdword;  // must be 64 bits wide
 | ||||||
| typedef u32 ARMword;   // must be 32 bits wide
 | typedef u32 ARMword;   // must be 32 bits wide
 | ||||||
| typedef u16 ARMhword;  // must be 16 bits wide
 | typedef u16 ARMhword;  // must be 16 bits wide
 | ||||||
| typedef u8 ARMbyte;    // must be 8 bits wide
 | typedef u8 ARMbyte;    // must be 8 bits wide
 | ||||||
| typedef struct ARMul_State ARMul_State; | typedef struct ARMul_State ARMul_State; | ||||||
| typedef struct ARMul_io ARMul_io; |  | ||||||
| typedef struct ARMul_Energy ARMul_Energy; |  | ||||||
| 
 |  | ||||||
| 
 | 
 | ||||||
| typedef unsigned ARMul_CPInits(ARMul_State* state); | typedef unsigned ARMul_CPInits(ARMul_State* state); | ||||||
| typedef unsigned ARMul_CPExits(ARMul_State* state); | typedef unsigned ARMul_CPExits(ARMul_State* state); | ||||||
|  | @ -98,65 +68,6 @@ typedef unsigned ARMul_CDPs(ARMul_State* state, unsigned type, ARMword instr); | ||||||
| typedef unsigned ARMul_CPReads(ARMul_State* state, unsigned reg, ARMword* value); | typedef unsigned ARMul_CPReads(ARMul_State* state, unsigned reg, ARMword* value); | ||||||
| typedef unsigned ARMul_CPWrites(ARMul_State* state, unsigned reg, ARMword value); | typedef unsigned ARMul_CPWrites(ARMul_State* state, unsigned reg, ARMword value); | ||||||
| 
 | 
 | ||||||
| 
 |  | ||||||
| //added by ksh,2004-3-5
 |  | ||||||
| struct ARMul_io |  | ||||||
| { |  | ||||||
|     ARMword *instr;      // to display the current interrupt state
 |  | ||||||
|     ARMword *net_flag;   // to judge if network is enabled
 |  | ||||||
|     ARMword *net_int;    // netcard interrupt
 |  | ||||||
| 
 |  | ||||||
|     //ywc,2004-04-01
 |  | ||||||
|     ARMword *ts_int; |  | ||||||
|     ARMword *ts_is_enable; |  | ||||||
|     ARMword *ts_addr_begin; |  | ||||||
|     ARMword *ts_addr_end; |  | ||||||
|     ARMword *ts_buffer; |  | ||||||
| }; |  | ||||||
| 
 |  | ||||||
| /* added by ksh,2004-11-26,some energy profiling */ |  | ||||||
| struct ARMul_Energy |  | ||||||
| { |  | ||||||
|     int energy_prof;        /* <tktan>  BUG200103282109 : for energy profiling */ |  | ||||||
|     int enable_func_energy; /* <tktan> BUG200105181702 */ |  | ||||||
|     char *func_energy; |  | ||||||
|     int func_display;       /* <tktan> BUG200103311509 : for function call display */ |  | ||||||
|     int func_disp_start;    /* <tktan> BUG200104191428 : to start func profiling */ |  | ||||||
|     char *start_func;       /* <tktan> BUG200104191428 */ |  | ||||||
| 
 |  | ||||||
|     FILE *outfile;          /* <tktan> BUG200105201531 : direct console to file */ |  | ||||||
|     long long tcycle, pcycle; |  | ||||||
|     float t_energy; |  | ||||||
|     void *cur_task;         /* <tktan> BUG200103291737 */ |  | ||||||
|     long long t_mem_cycle, t_idle_cycle, t_uart_cycle; |  | ||||||
|     long long p_mem_cycle, p_idle_cycle, p_uart_cycle; |  | ||||||
|     long long p_io_update_tcycle; |  | ||||||
|     /*record CCCR,to get current core frequency */ |  | ||||||
|     ARMword cccr; |  | ||||||
| }; |  | ||||||
| #if 0 |  | ||||||
| #define MAX_BANK 8 |  | ||||||
| #define MAX_STR  1024 |  | ||||||
| 
 |  | ||||||
| typedef struct mem_bank |  | ||||||
| { |  | ||||||
|     ARMword (*read_byte) (ARMul_State* state, ARMword addr); |  | ||||||
|     void (*write_byte) (ARMul_State* state, ARMword addr, ARMword data); |  | ||||||
|     ARMword (*read_halfword) (ARMul_State* state, ARMword addr); |  | ||||||
|     void (*write_halfword) (ARMul_State* state, ARMword addr, ARMword data); |  | ||||||
|     ARMword (*read_word) (ARMul_State* state, ARMword addr); |  | ||||||
|     void (*write_word) (ARMul_State* state, ARMword addr, ARMword data); |  | ||||||
|     unsigned int addr, len; |  | ||||||
|     char filename[MAX_STR]; |  | ||||||
|     unsigned type;        //chy 2003-09-21: maybe io,ram,rom
 |  | ||||||
| } mem_bank_t; |  | ||||||
| typedef struct |  | ||||||
| { |  | ||||||
|     int bank_num; |  | ||||||
|     int current_num;    /*current num of bank */ |  | ||||||
|     mem_bank_t mem_banks[MAX_BANK]; |  | ||||||
| } mem_config_t; |  | ||||||
| #endif |  | ||||||
| #define VFP_REG_NUM 64 | #define VFP_REG_NUM 64 | ||||||
| struct ARMul_State | struct ARMul_State | ||||||
| { | { | ||||||
|  | @ -196,9 +107,8 @@ struct ARMul_State | ||||||
|     ARMdword Accumulator; |     ARMdword Accumulator; | ||||||
| 
 | 
 | ||||||
|     ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags;    /* dummy flags for speed */ |     ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags;    /* dummy flags for speed */ | ||||||
|         unsigned long long int icounter, debug_icounter, kernel_icounter; |     unsigned long long int icounter, debug_icounter, kernel_icounter; | ||||||
|         unsigned int shifter_carry_out; |     unsigned int shifter_carry_out; | ||||||
|         //ARMword translate_pc;
 |  | ||||||
| 
 | 
 | ||||||
|     /* add armv6 flags dyf:2010-08-09 */ |     /* add armv6 flags dyf:2010-08-09 */ | ||||||
|     ARMword GEFlag, EFlag, AFlag, QFlag; |     ARMword GEFlag, EFlag, AFlag, QFlag; | ||||||
|  | @ -226,9 +136,6 @@ struct ARMul_State | ||||||
|     unsigned CanWatch;                      /* set by memory interface if its willing to suffer the
 |     unsigned CanWatch;                      /* set by memory interface if its willing to suffer the
 | ||||||
|                                                overhead of checking for watchpoints on each memory |                                                overhead of checking for watchpoints on each memory | ||||||
|                                                access */ |                                                access */ | ||||||
|     unsigned int StopHandle; |  | ||||||
| 
 |  | ||||||
|     char *CommandLine;                      /* Command Line from ARMsd */ |  | ||||||
| 
 | 
 | ||||||
|     ARMul_CPInits *CPInit[16];              /* coprocessor initialisers */ |     ARMul_CPInits *CPInit[16];              /* coprocessor initialisers */ | ||||||
|     ARMul_CPExits *CPExit[16];              /* coprocessor finalisers */ |     ARMul_CPExits *CPExit[16];              /* coprocessor finalisers */ | ||||||
|  | @ -244,10 +151,6 @@ struct ARMul_State | ||||||
|     unsigned char *CPData[16];              /* Coprocessor data */ |     unsigned char *CPData[16];              /* Coprocessor data */ | ||||||
|     unsigned char const *CPRegWords[16];    /* map of coprocessor register sizes */ |     unsigned char const *CPRegWords[16];    /* map of coprocessor register sizes */ | ||||||
| 
 | 
 | ||||||
|     unsigned EventSet;                      /* the number of events in the queue */ |  | ||||||
|     unsigned int Now;                       /* time to the nearest cycle */ |  | ||||||
|     struct EventNode **EventPtr;            /* the event list */ |  | ||||||
| 
 |  | ||||||
|     unsigned Debug;                         /* show instructions as they are executed */ |     unsigned Debug;                         /* show instructions as they are executed */ | ||||||
|     unsigned NresetSig;                     /* reset the processor */ |     unsigned NresetSig;                     /* reset the processor */ | ||||||
|     unsigned NfiqSig; |     unsigned NfiqSig; | ||||||
|  | @ -300,17 +203,9 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model) | ||||||
|     ARMword Base;                /* extra hand for base writeback */ |     ARMword Base;                /* extra hand for base writeback */ | ||||||
|     ARMword AbortAddr;           /* to keep track of Prefetch aborts */ |     ARMword AbortAddr;           /* to keep track of Prefetch aborts */ | ||||||
| 
 | 
 | ||||||
|     const struct Dbg_HostosInterface *hostif; |  | ||||||
| 
 |  | ||||||
|     int verbose;        /* non-zero means print various messages like the banner */ |     int verbose;        /* non-zero means print various messages like the banner */ | ||||||
| 
 | 
 | ||||||
|     int mmu_inited; |     int mmu_inited; | ||||||
|     //mem_state_t mem;
 |  | ||||||
|     /*remove io_state to skyeye_mach_*.c files */ |  | ||||||
|     //io_state_t io;
 |  | ||||||
|     /* point to a interrupt pending register. now for skyeye-ne2k.c
 |  | ||||||
|      * later should move somewhere. e.g machine_config_t*/ |  | ||||||
| 
 |  | ||||||
| 
 | 
 | ||||||
|     //chy: 2003-08-11, for different arm core type
 |     //chy: 2003-08-11, for different arm core type
 | ||||||
|     unsigned is_v4;        /* Are we emulating a v4 architecture (or higher) ?  */ |     unsigned is_v4;        /* Are we emulating a v4 architecture (or higher) ?  */ | ||||||
|  | @ -321,44 +216,17 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model) | ||||||
|     unsigned is_XScale;    /* Are we emulating an XScale architecture ?  */ |     unsigned is_XScale;    /* Are we emulating an XScale architecture ?  */ | ||||||
|     unsigned is_iWMMXt;    /* Are we emulating an iWMMXt co-processor ?  */ |     unsigned is_iWMMXt;    /* Are we emulating an iWMMXt co-processor ?  */ | ||||||
|     unsigned is_ep9312;    /* Are we emulating a Cirrus Maverick co-processor ?  */ |     unsigned is_ep9312;    /* Are we emulating a Cirrus Maverick co-processor ?  */ | ||||||
|     //chy 2005-09-19
 |  | ||||||
|     unsigned is_pxa27x;    /* Are we emulating a Intel PXA27x co-processor ?  */ |     unsigned is_pxa27x;    /* Are we emulating a Intel PXA27x co-processor ?  */ | ||||||
|  | 
 | ||||||
|     //chy: seems only used in xscale's CP14
 |     //chy: seems only used in xscale's CP14
 | ||||||
|     unsigned int LastTime; /* Value of last call to ARMul_Time() */ |  | ||||||
|     ARMword CP14R0_CCD;    /* used to count 64 clock cycles with CP14 R0 bit 3 set */ |     ARMword CP14R0_CCD;    /* used to count 64 clock cycles with CP14 R0 bit 3 set */ | ||||||
| 
 | 
 | ||||||
| 
 |  | ||||||
|     //added by ksh:for handle different machs io 2004-3-5
 |  | ||||||
|     ARMul_io mach_io; |  | ||||||
| 
 |  | ||||||
|     /*added by ksh,2004-11-26,some energy profiling*/ |  | ||||||
|     ARMul_Energy energy; |  | ||||||
| 
 |  | ||||||
|     //teawater add for next_dis 2004.10.27-----------------------
 |  | ||||||
|     int disassemble; |  | ||||||
| 
 |  | ||||||
| 
 |  | ||||||
|     //teawater add for arm2x86 2005.02.15-------------------------------------------
 |  | ||||||
|     u32 trap; |  | ||||||
|     u32 tea_break_addr; |  | ||||||
|     u32 tea_break_ok; |  | ||||||
|     int tea_pc; |  | ||||||
| 
 |  | ||||||
|     //teawater add for arm2x86 2005.07.05-------------------------------------------
 |     //teawater add for arm2x86 2005.07.05-------------------------------------------
 | ||||||
|     //arm_arm A2-18
 |     //arm_arm A2-18
 | ||||||
|     int abort_model;    //0 Base Restored Abort Model, 1 the Early Abort Model, 2 Base Updated Abort Model
 |     int abort_model;    //0 Base Restored Abort Model, 1 the Early Abort Model, 2 Base Updated Abort Model
 | ||||||
| 
 | 
 | ||||||
|     //teawater change for return if running tb dirty 2005.07.09---------------------
 |  | ||||||
|     void *tb_now; |  | ||||||
| 
 |  | ||||||
| 
 |  | ||||||
|     //teawater add for record reg value to ./reg.txt 2005.07.10---------------------
 |  | ||||||
|     FILE *tea_reg_fd; |  | ||||||
| 
 |  | ||||||
| 
 |  | ||||||
|     /*added by ksh in 2005-10-1*/ |     /*added by ksh in 2005-10-1*/ | ||||||
|     cpu_config_t *cpu; |     cpu_config_t *cpu; | ||||||
|     //mem_config_t *mem_bank;
 |  | ||||||
| 
 | 
 | ||||||
|     /* added LPC remap function */ |     /* added LPC remap function */ | ||||||
|     int vector_remap_flag; |     int vector_remap_flag; | ||||||
|  | @ -367,23 +235,12 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model) | ||||||
| 
 | 
 | ||||||
|     u32 step; |     u32 step; | ||||||
|     u32 cycle; |     u32 cycle; | ||||||
|     int stop_simulator; | 
 | ||||||
|     conf_object_t *dyncom_cpu; |  | ||||||
| //teawater add DBCT_TEST_SPEED 2005.10.04---------------------------------------
 |  | ||||||
| #ifdef DBCT_TEST_SPEED |  | ||||||
|     uint64_t    instr_count; |  | ||||||
| #endif    //DBCT_TEST_SPEED
 |  | ||||||
| //    FILE * state_log;
 |  | ||||||
| //diff log
 |  | ||||||
| //#if DIFF_STATE
 |  | ||||||
|     FILE * state_log; |  | ||||||
| //#endif
 |  | ||||||
|     /* monitored memory for exclusice access */ |     /* monitored memory for exclusice access */ | ||||||
|     ARMword exclusive_tag_array[128]; |     ARMword exclusive_tag_array[128]; | ||||||
|     /* 1 means exclusive access and 0 means open access */ |     /* 1 means exclusive access and 0 means open access */ | ||||||
|     ARMword exclusive_access_state; |     ARMword exclusive_access_state; | ||||||
| 
 | 
 | ||||||
|     memory_space_intf space;     |  | ||||||
|     u32 CurrInstr; |     u32 CurrInstr; | ||||||
|     u32 last_pc; /* the last pc executed */ |     u32 last_pc; /* the last pc executed */ | ||||||
|     u32 last_instr; /* the last inst executed */ |     u32 last_instr; /* the last inst executed */ | ||||||
|  | @ -392,7 +249,6 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model) | ||||||
|     u32 WritePc[17]; |     u32 WritePc[17]; | ||||||
|     u32 CurrWrite; |     u32 CurrWrite; | ||||||
| }; | }; | ||||||
| #define DIFF_WRITE 0 |  | ||||||
| 
 | 
 | ||||||
| typedef ARMul_State arm_core_t; | typedef ARMul_State arm_core_t; | ||||||
| 
 | 
 | ||||||
|  | @ -519,13 +375,6 @@ extern void ARMul_Reset(ARMul_State* state); | ||||||
| extern ARMul_State *ARMul_NewState(ARMul_State* state); | extern ARMul_State *ARMul_NewState(ARMul_State* state); | ||||||
| extern ARMword ARMul_DoProg(ARMul_State* state); | extern ARMword ARMul_DoProg(ARMul_State* state); | ||||||
| extern ARMword ARMul_DoInstr(ARMul_State* state); | extern ARMword ARMul_DoInstr(ARMul_State* state); | ||||||
| /***************************************************************************\
 |  | ||||||
| *                Definitons of things for event handling                    * |  | ||||||
| \***************************************************************************/ |  | ||||||
| 
 |  | ||||||
| extern void ARMul_ScheduleEvent(ARMul_State* state, unsigned int delay, unsigned(*func) ()); |  | ||||||
| extern void ARMul_EnvokeEvent(ARMul_State* state); |  | ||||||
| extern unsigned int ARMul_Time(ARMul_State* state); |  | ||||||
| 
 | 
 | ||||||
| /***************************************************************************\
 | /***************************************************************************\
 | ||||||
| *                          Useful support routines                          * | *                          Useful support routines                          * | ||||||
|  | @ -724,56 +573,12 @@ enum ConditionCode { | ||||||
| #define IFFLAGS    state->IFFlags | #define IFFLAGS    state->IFFlags | ||||||
| #endif //VFLAG
 | #endif //VFLAG
 | ||||||
| 
 | 
 | ||||||
| #define SKYEYE_OUTREGS(fd) { fprintf ((fd), "R %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,C %x,S %x,%x,%x,%x,%x,%x,%x,M %x,B %x,E %x,I %x,P %x,T %x,L %x,D %x,",\ |  | ||||||
|                          state->Reg[0],state->Reg[1],state->Reg[2],state->Reg[3], \ |  | ||||||
|                          state->Reg[4],state->Reg[5],state->Reg[6],state->Reg[7], \ |  | ||||||
|                          state->Reg[8],state->Reg[9],state->Reg[10],state->Reg[11], \ |  | ||||||
|                          state->Reg[12],state->Reg[13],state->Reg[14],state->Reg[15], \ |  | ||||||
|                          state->Cpsr,   state->Spsr[0], state->Spsr[1], state->Spsr[2],\ |  | ||||||
|                          state->Spsr[3],state->Spsr[4], state->Spsr[5], state->Spsr[6],\ |  | ||||||
|                          state->Mode,state->Bank,state->ErrorCode,state->instr,state->pc,\ |  | ||||||
|                          state->temp,state->loaded,state->decoded);} |  | ||||||
| 
 |  | ||||||
| #define SKYEYE_OUTMOREREGS(fd) { fprintf ((fd),"\ |  | ||||||
| RUs %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\ |  | ||||||
| RF  %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\ |  | ||||||
| RI  %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\ |  | ||||||
| RS  %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\ |  | ||||||
| RA  %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\ |  | ||||||
| RUn %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x\n",\
 |  | ||||||
|                          state->RegBank[0][0],state->RegBank[0][1],state->RegBank[0][2],state->RegBank[0][3], \ |  | ||||||
|                          state->RegBank[0][4],state->RegBank[0][5],state->RegBank[0][6],state->RegBank[0][7], \ |  | ||||||
|                          state->RegBank[0][8],state->RegBank[0][9],state->RegBank[0][10],state->RegBank[0][11], \ |  | ||||||
|                          state->RegBank[0][12],state->RegBank[0][13],state->RegBank[0][14],state->RegBank[0][15], \ |  | ||||||
|                          state->RegBank[1][0],state->RegBank[1][1],state->RegBank[1][2],state->RegBank[1][3], \ |  | ||||||
|                          state->RegBank[1][4],state->RegBank[1][5],state->RegBank[1][6],state->RegBank[1][7], \ |  | ||||||
|                          state->RegBank[1][8],state->RegBank[1][9],state->RegBank[1][10],state->RegBank[1][11], \ |  | ||||||
|                          state->RegBank[1][12],state->RegBank[1][13],state->RegBank[1][14],state->RegBank[1][15], \ |  | ||||||
|                          state->RegBank[2][0],state->RegBank[2][1],state->RegBank[2][2],state->RegBank[2][3], \ |  | ||||||
|                          state->RegBank[2][4],state->RegBank[2][5],state->RegBank[2][6],state->RegBank[2][7], \ |  | ||||||
|                          state->RegBank[2][8],state->RegBank[2][9],state->RegBank[2][10],state->RegBank[2][11], \ |  | ||||||
|                          state->RegBank[2][12],state->RegBank[2][13],state->RegBank[2][14],state->RegBank[2][15], \ |  | ||||||
|                          state->RegBank[3][0],state->RegBank[3][1],state->RegBank[3][2],state->RegBank[3][3], \ |  | ||||||
|                          state->RegBank[3][4],state->RegBank[3][5],state->RegBank[3][6],state->RegBank[3][7], \ |  | ||||||
|                          state->RegBank[3][8],state->RegBank[3][9],state->RegBank[3][10],state->RegBank[3][11], \ |  | ||||||
|                          state->RegBank[3][12],state->RegBank[3][13],state->RegBank[3][14],state->RegBank[3][15], \ |  | ||||||
|                          state->RegBank[4][0],state->RegBank[4][1],state->RegBank[4][2],state->RegBank[4][3], \ |  | ||||||
|                          state->RegBank[4][4],state->RegBank[4][5],state->RegBank[4][6],state->RegBank[4][7], \ |  | ||||||
|                          state->RegBank[4][8],state->RegBank[4][9],state->RegBank[4][10],state->RegBank[4][11], \ |  | ||||||
|                          state->RegBank[4][12],state->RegBank[4][13],state->RegBank[4][14],state->RegBank[4][15], \ |  | ||||||
|                          state->RegBank[5][0],state->RegBank[5][1],state->RegBank[5][2],state->RegBank[5][3], \ |  | ||||||
|                          state->RegBank[5][4],state->RegBank[5][5],state->RegBank[5][6],state->RegBank[5][7], \ |  | ||||||
|                          state->RegBank[5][8],state->RegBank[5][9],state->RegBank[5][10],state->RegBank[5][11], \ |  | ||||||
|                          state->RegBank[5][12],state->RegBank[5][13],state->RegBank[5][14],state->RegBank[5][15] \ |  | ||||||
|         );} |  | ||||||
| 
 |  | ||||||
| extern bool AddOverflow(ARMword, ARMword, ARMword); | extern bool AddOverflow(ARMword, ARMword, ARMword); | ||||||
| extern bool SubOverflow(ARMword, ARMword, ARMword); | extern bool SubOverflow(ARMword, ARMword, ARMword); | ||||||
| 
 | 
 | ||||||
| extern void ARMul_UndefInstr(ARMul_State*, ARMword); | extern void ARMul_UndefInstr(ARMul_State*, ARMword); | ||||||
| extern void ARMul_FixCPSR(ARMul_State*, ARMword, ARMword); | extern void ARMul_FixCPSR(ARMul_State*, ARMword, ARMword); | ||||||
| extern void ARMul_FixSPSR(ARMul_State*, ARMword, ARMword); | extern void ARMul_FixSPSR(ARMul_State*, ARMword, ARMword); | ||||||
| extern void ARMul_ConsolePrint(ARMul_State*, const char*, ...); |  | ||||||
| extern void ARMul_SelectProcessor(ARMul_State*, unsigned); | extern void ARMul_SelectProcessor(ARMul_State*, unsigned); | ||||||
| 
 | 
 | ||||||
| extern u32 AddWithCarry(u32, u32, u32, bool*, bool*); | extern u32 AddWithCarry(u32, u32, u32, bool*, bool*); | ||||||
|  | @ -791,8 +596,3 @@ extern u16 ARMul_UnsignedSaturatedSub16(u16, u16); | ||||||
| extern u8 ARMul_UnsignedAbsoluteDifference(u8, u8); | extern u8 ARMul_UnsignedAbsoluteDifference(u8, u8); | ||||||
| extern u32 ARMul_SignedSatQ(s32, u8, bool*); | extern u32 ARMul_SignedSatQ(s32, u8, bool*); | ||||||
| extern u32 ARMul_UnsignedSatQ(s32, u8, bool*); | extern u32 ARMul_UnsignedSatQ(s32, u8, bool*); | ||||||
| 
 |  | ||||||
| #define DIFF_LOG 0 |  | ||||||
| #define SAVE_LOG 0 |  | ||||||
| 
 |  | ||||||
| #endif /* _ARMDEFS_H_ */ |  | ||||||
|  |  | ||||||
|  | @ -575,8 +575,6 @@ extern ARMword ARMul_GetPC (ARMul_State *); | ||||||
| extern ARMword ARMul_GetNextPC (ARMul_State *); | extern ARMword ARMul_GetNextPC (ARMul_State *); | ||||||
| extern ARMword ARMul_GetR15 (ARMul_State *); | extern ARMword ARMul_GetR15 (ARMul_State *); | ||||||
| extern ARMword ARMul_GetCPSR (ARMul_State *); | extern ARMword ARMul_GetCPSR (ARMul_State *); | ||||||
| extern void ARMul_EnvokeEvent (ARMul_State *); |  | ||||||
| extern unsigned int ARMul_Time (ARMul_State *); |  | ||||||
| extern void ARMul_NegZero (ARMul_State *, ARMword); | extern void ARMul_NegZero (ARMul_State *, ARMword); | ||||||
| extern void ARMul_SetPC (ARMul_State *, ARMword); | extern void ARMul_SetPC (ARMul_State *, ARMword); | ||||||
| extern void ARMul_SetR15 (ARMul_State *, ARMword); | extern void ARMul_SetR15 (ARMul_State *, ARMword); | ||||||
|  | @ -603,8 +601,7 @@ extern void ARMul_AddCarry (ARMul_State *, ARMword, ARMword, ARMword); | ||||||
| extern tdstate ARMul_ThumbDecode (ARMul_State *, ARMword, ARMword, ARMword *); | extern tdstate ARMul_ThumbDecode (ARMul_State *, ARMword, ARMword, ARMword *); | ||||||
| extern ARMword ARMul_GetReg (ARMul_State *, unsigned, unsigned); | extern ARMword ARMul_GetReg (ARMul_State *, unsigned, unsigned); | ||||||
| extern void ARMul_SetReg (ARMul_State *, unsigned, unsigned, ARMword); | extern void ARMul_SetReg (ARMul_State *, unsigned, unsigned, ARMword); | ||||||
| extern void ARMul_ScheduleEvent (ARMul_State *, unsigned int, | 
 | ||||||
| 				 unsigned (*)(ARMul_State *)); |  | ||||||
| /* Coprocessor support functions.  */ | /* Coprocessor support functions.  */ | ||||||
| extern unsigned ARMul_CoProInit (ARMul_State *); | extern unsigned ARMul_CoProInit (ARMul_State *); | ||||||
| extern void ARMul_CoProExit (ARMul_State *); | extern void ARMul_CoProExit (ARMul_State *); | ||||||
|  |  | ||||||
|  | @ -1,5 +1,4 @@ | ||||||
| #ifndef CORE_ARM_SKYEYE_DEFS_H_ | #pragma once | ||||||
| #define CORE_ARM_SKYEYE_DEFS_H_ |  | ||||||
| 
 | 
 | ||||||
| #include "common/common.h" | #include "common/common.h" | ||||||
| 
 | 
 | ||||||
|  | @ -8,21 +7,15 @@ | ||||||
| 
 | 
 | ||||||
| typedef struct | typedef struct | ||||||
| { | { | ||||||
| 	const char *cpu_arch_name;	/*cpu architecture version name.e.g. armv4t */ | 	const char *cpu_arch_name; /* CPU architecture version name.e.g. armv4t */ | ||||||
| 	const char *cpu_name;	/*cpu name. e.g. arm7tdmi or arm720t */ | 	const char *cpu_name;      /* CPU name. e.g. arm7tdmi or arm720t */ | ||||||
| 	u32 cpu_val;	/*CPU value; also call MMU ID or processor id;see
 | 	u32 cpu_val;               /*CPU value; also call MMU ID or processor id;see
 | ||||||
| 				   ARM Architecture Reference Manual B2-6 */ | 	                             ARM Architecture Reference Manual B2-6 */ | ||||||
| 	u32 cpu_mask;	/*cpu_val's mask. */ | 	u32 cpu_mask;              /* cpu_val's mask. */ | ||||||
| 	u32 cachetype;	/*this cpu has what kind of cache */ | 	u32 cachetype;             /* this CPU has what kind of cache */ | ||||||
| } cpu_config_t; | } cpu_config_t; | ||||||
| 
 | 
 | ||||||
| typedef struct conf_object_s{ | typedef enum { | ||||||
| 	char* objname; |  | ||||||
| 	void* obj; |  | ||||||
| 	char* class_name; |  | ||||||
| }conf_object_t; |  | ||||||
| 
 |  | ||||||
| typedef enum{ |  | ||||||
| 	/* No exception */ | 	/* No exception */ | ||||||
| 	No_exp = 0, | 	No_exp = 0, | ||||||
| 	/* Memory allocation exception */ | 	/* Memory allocation exception */ | ||||||
|  | @ -44,70 +37,21 @@ typedef enum{ | ||||||
| 
 | 
 | ||||||
| 	/* Unknown exception */ | 	/* Unknown exception */ | ||||||
| 	Unknown_exp | 	Unknown_exp | ||||||
| }exception_t; | } exception_t; | ||||||
| 
 | 
 | ||||||
| typedef enum { | typedef enum { | ||||||
| 	Align = 0, | 	Align = 0, | ||||||
| 	UnAlign	 | 	UnAlign	 | ||||||
| }align_t; | } align_t; | ||||||
| 
 | 
 | ||||||
| typedef enum { | typedef enum { | ||||||
| 	Little_endian = 0, | 	Little_endian = 0, | ||||||
| 	Big_endian | 	Big_endian | ||||||
| }endian_t; | } endian_t; | ||||||
| //typedef int exception_t;
 |  | ||||||
| 
 | 
 | ||||||
| typedef enum{ | typedef enum { | ||||||
| 	Phys_addr = 0, | 	Phys_addr = 0, | ||||||
| 	Virt_addr | 	Virt_addr | ||||||
| }addr_type_t; | } addr_type_t; | ||||||
| 
 |  | ||||||
| typedef exception_t(*read_byte_t)(conf_object_t* target, u32 addr, void *buf, size_t count); |  | ||||||
| typedef exception_t(*write_byte_t)(conf_object_t* target, u32 addr, const void *buf, size_t count); |  | ||||||
| 
 |  | ||||||
| typedef struct memory_space{ |  | ||||||
| 	conf_object_t* conf_obj; |  | ||||||
| 	read_byte_t read; |  | ||||||
| 	write_byte_t write; |  | ||||||
| }memory_space_intf; |  | ||||||
| 
 |  | ||||||
| 
 |  | ||||||
| /*
 |  | ||||||
|  * a running instance for a specific archteciture. |  | ||||||
|  */ |  | ||||||
| typedef struct generic_arch_s |  | ||||||
| { |  | ||||||
| 	char* arch_name; |  | ||||||
| 	void (*init) (void); |  | ||||||
| 	void (*reset) (void); |  | ||||||
| 	void (*step_once) (void); |  | ||||||
| 	void (*set_pc)(u32 addr); |  | ||||||
| 	u32 (*get_pc)(void); |  | ||||||
| 	u32 (*get_step)(void); |  | ||||||
| 	//chy 2004-04-15 
 |  | ||||||
| 	//int (*ICE_write_byte) (u32 addr, uint8_t v);
 |  | ||||||
| 	//int (*ICE_read_byte)(u32 addr, uint8_t *pv);
 |  | ||||||
| 	u32 (*get_regval_by_id)(int id); |  | ||||||
| 	u32 (*get_regnum)(void); |  | ||||||
| 	char* (*get_regname_by_id)(int id); |  | ||||||
| 	exception_t (*set_regval_by_id)(int id, u32 value); |  | ||||||
| 	/*
 |  | ||||||
| 	 * read a data by virtual address. |  | ||||||
| 	 */ |  | ||||||
| 	exception_t (*mmu_read)(short size, u32 addr, u32 * value); |  | ||||||
| 	/*
 |  | ||||||
| 	 * write a data by a virtual address. |  | ||||||
| 	 */ |  | ||||||
| 	exception_t (*mmu_write)(short size, u32 addr, u32 value); |  | ||||||
| 	/**
 |  | ||||||
| 	 * get a signal from external |  | ||||||
| 	 */ |  | ||||||
| 	//exception_t (*signal)(interrupt_signal_t* signal);
 |  | ||||||
| 
 |  | ||||||
| 	endian_t endianess; |  | ||||||
| 	align_t alignment; |  | ||||||
| } generic_arch_t; |  | ||||||
| 
 | 
 | ||||||
| typedef u32 addr_t; | typedef u32 addr_t; | ||||||
| 
 |  | ||||||
| #endif |  | ||||||
|  |  | ||||||
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